The mCPU and mGPU: a console in an FPGA

As a life long software dev I’m now dipping my toes into the world of hardware. I’ve set myself the possibly over ambitious target of implementing pretty much an entire custom retro console on an FPGA in VHDL – everything from the CPU & GPU up through the operating system and compiler/assembler and through to applications and games.

The working name for the console is m32

The aim is to get to something around N64/PS1 standard but I’d love to go beyond that.

Why? Because its fun! And hopefully I’ll learn a lot.

Why mCPU and mGPU? Well its mikesCpu and mikesGPU. I’m bad with names.

This is very much still work in progress but I’ll keep updating this site as things change. I’m hoping to get this all open sourced and working through the legal questions at the moment.

Currently the project is coming along nicely – I have a CPU and a GPU, an assembler and a basic OS with filesystem access, alongside HDMI/SD card access and other related systems. Not everything is plumbed together yet though.

The GPU & CPU is written in VHDL using almost entirely handwritten code. The main IPs I use from the FPGA provider are the block-ram/FIFO primitives and the DRAM memory controller. Almost everything else was written by me. I’m currently aiming on getting it working on one of Digilents excellent Arty series – probably an Arty A7-100 but if I can squeeze it down to a Arty S7-50 I will do.

I’ve already posted a demo of the CPU and GPU here to get going.

Until I get it open sourced, or to learn more, I’d highly recommend Colin Riley’s blog which covers a lot of how to get something like this bootstrapped. It was his TPU articles which got me interesting in this topic.